»Ê¹Ú²ÊƱ

Associate Professor Oliver Diessel

Associate Professor Oliver Diessel

Associate Professor
Engineering
Computer Science and Engineering

Dr Oliver Diessel is an Associate Professor in theÌýSchoolÌýof ComputerÌýScience and Engineering.

Research interests

Ìý

I develop methods for the design, test and implementation of digital systems in reconfigurable logic devices called Field-Programmable Gate Arrays.

My interest is in dynamically reconfigurable digital systems in which the circuits are modified while the system is operational.

I aim to promote the use of reconfigurable systems through the development of architectures, design methods and tools that enhance their benefits and reduce their costs.

Interest in engineering

Why did you get into engineering?

A fascination with technology and a natural tendency towards mathematics and science.

What are your research goals?

To develop smart devices that can act independently to benefit people.

What do people not understand about what you do?

They think I can help with practical issues such as fixing their PC or advising them on the best machine to buy. They would be better off asking me some theoretical questions.

Advice for prospective computer engineers & scientists

A career in computer engineering or computer science can see you changing the world. With this great power comes great responsibility. Keep an open mind to the wider implications of what you learn and do. And follow your dream.

Lectures/Courses taught

Configurable Systems

, »Ê¹Ú²ÊƱ (2009 – present)

Computer Architecture

, »Ê¹Ú²ÊƱ (2004 – 2006)

, »Ê¹Ú²ÊƱ (2002 – 2006, 2012)

Digital Systems

, »Ê¹Ú²ÊƱ (2008, 2010 – present)

FPGA Implementation of Digital Systems using Verilog, Harbin Institute of Technology (2014 - present)

COMP2021 – Digital Systems Structures, »Ê¹Ú²ÊƱ (2000 – 2004)

FPGA Design Course, Ho Chi Minh City University of Technology (2003)

Computer Programming

, »Ê¹Ú²ÊƱ (2008 – 2009)

XCMP1000 – Computing 1, »Ê¹Ú²ÊƱ Asia (2007)

COMP1021 – Computing 1B, »Ê¹Ú²ÊƱ (2005)

Professional Issues & Ethics

COMP4920 – Professional Issues and Ethics, »Ê¹Ú²ÊƱ (2001)

Students

Number currently in lab: 2

Number graduated: 6

Student Projects:

Current students work on design of fault-tolerant FPGA-based systems for space and fine-grained accelerators for heterogeneous devices.

Previous students have worked on multi-core task migration, the verification of dynamically reconfigurable systems, communications infrastructure for module-based dynamically reconfigurable systems, and configuration encoding techniques for rapid reconfiguration.

Looking for students for projects related to:

Dynamic modular reconfiguration of FPGA-based TMR circuits. This project involves the development of techniques to meet reliability, performance and resource constraints for SRAM FPGA-based implementations of digital systems to recover from radiation-induced Single Event Upsets. We are investigating design approaches, CAD tools for circuit synthesis, partitioning and layout, and benchmarking with circuits typical of applications deployed in space.

Run-time validation of FPGA-based computations. Computational tasks hosted on FPGA devices are increasingly susceptible to run-time errors due to process variation, device degradation and radiation. This project seeks to develop efficient (better than TMR) techniques for checking the correctness of tasks while they are running. Another thrust is to validate dynamically acquired FPGA configurations.

Professional Organisations and Consulting positions

IEEE Member

Editorial Board, ACM Transactions on Reconfigurable Technology and Systems

Education

PhD/postgraduate

PhD, University of Newcastle, Australia, 1998

Undergraduate

B.E. (Computer, Hons), University of Newcastle, Australia, 1991

B.Math., University of Newcastle, Australia, 1991

Phone
+61 2 9385 7384
Location
School of Computer Science & Engineering (K17) Level 5, Room 501B Kensington Campus
  • Books | 2014
    Gong L; Diessel O, 2014, Functional Verification of Dynamically Reconfigurable FPGA-based Systems, Springer
    Books | 2000
    ElGindy H; Prasanna VK; Schmeck H; Diessel O, 2000, 7th Reconfigurable Architectures Workshop (RAW2000)
  • Book Chapters | 2016
    Cetin E; Diessel O; Li T; Ambrose J; Fisk T; Parameswaran S; Dempster A, 2016, 'Overview and Investigation of SEU Detection and Recovery Approaches for FPGA-Based Heterogeneous Systems', in FPGAs and Parallel Architectures for Aerospace Applications Soft Errors and Fault-Tolerant Design, Springer, pp. 33 - 46,
  • Journal articles | 2019
    Kroh A; Diessel O, 2019, 'Efficient fine-grained processor-logic interactions on the cache-coherent zynq platform', ACM Transactions on Reconfigurable Technology and Systems, 11,
    Journal articles | 2018
    Agiakatsikas D; Cetin E; Diessel O, 2018, 'FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs', IEEE Transactions on Aerospace and Electronic Systems, 54, pp. 2695 - 2712,
    Journal articles | 2018
    Nguyen NTH; Agiakatsikas D; Zhao Z; Wu T; Cetin E; Diessel O; Gong L, 2018, 'Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery', Microprocessors and Microsystems, 60, pp. 86 - 95,
    Journal articles | 2018
    Zhao Z; Nguyen NTH; Agiakatsikas D; Lee G; Cetin E; Diessel O, 2018, 'Fine-grained module-based error recovery in FPGA-based TMR systems', ACM Transactions on Reconfigurable Technology and Systems, 11, pp. 1 - 23,
    Journal articles | 2017
    Lee G; Cetin E; Diessel O, 2017, 'Fault recovery time analysis for coarse-grained reconfigurable architectures', ACM Transactions on Embedded Computing Systems, 17, pp. 1 - 21,
    Journal articles | 2017
    Leong PHW; Amano H; Anderson J; Bertels K; Cardoso JMP; Diessel O; Gogniat G; Hutton M; Lee J; Luk W; Lysaght P; Platzner M; Prasanna VK; Rissa T; Silvano C; So HKH; Wang Y, 2017, 'The first 25 years of the FPL conference: Significant papers', ACM Transactions on Reconfigurable Technology and Systems, 10,
    Journal articles | 2017
    Wang C; Li X; Chen Y; Zhang Y; Diessel O; Zhou X, 2017, 'Service-Oriented Architecture on FPGA-Based MPSoC', IEEE Transactions on Parallel and Distributed Systems, 28, pp. 2993 - 3006,
    Journal articles | 2014
    Gong L; Diessel O, 2014, 'Simulation-based functional verification of dynamically reconfigurable systems', ACM Transactions on Embedded Computing Systems (TECS), 13, pp. 97 - 97
    Journal articles | 2012
    Shannon L; Diessel O; Bergmann NW, 2012, 'Guest editorial: Field-programmable technology', Journal of Signal Processing Systems, 67, pp. 1 - 2,
    Journal articles | 2010
    Koh S; Diessel OF, 2010, 'Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration', ACM Transactions on Reconfigurable Technology and Systems, 3, pp. 1 - 36,
    Journal articles | 2004
    Scheuermann B; So KK; Guntsch M; Middendorf M; Diessel OF; Elgindy H; Schmeck H, 2004, 'FPGA Implementation of Population-based Ant Colony Optimization', Applied soft computing : the official journal of the World Federation on Soft Computing (WFSC), 4, pp. 303 - 322
    Journal articles | 2002
    Diessel O; Malik U; So K, 2002, 'Towards high-level specification, synthesis, and virtualization of programmable logic designs', European Conference on Parallel Processing, pp. 314 - 317
    Journal articles | 2001
    Diessel OF; Elgindy H, 2001, 'On dynamic task scheduling for FPGA-based systems', International Journal of Foundations of Computer Science, 12, pp. 645 - 669
    Journal articles | 2001
    Diessel OF; Milne G, 2001, 'A hardware compiler realizing concurrent processes in reconfigurable logic', IEE Proceedings-Computers and Digital Techniques, 148, pp. 152 - 162
    Journal articles | 2000
    Diessel OF; Elgindy H; Middendorf M; Schmeck H; Schmidt B, 2000, 'Dynamic scheduling of tasks on partially reconfigurable FPGAs', IEE Proceedings-Computers and Digital Techniques, 147, pp. 181 - 188
    Journal articles | 1996
    Beresford-Smith B; Diessel O; ElGindy H, 1996, 'Optimal algorithms for constrained reconfigurable meshes', Journal of Parallel and Distributed Computing, 39, pp. 74 - 78
  • Conference Papers | 2022
    Fan J; Diessel O, 2022, 'On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs', in Proceedings 2022 IEEE 30th International Symposium on Field Programmable Custom Computing Machines Fccm 2022,
    Conference Papers | 2022
    Wu T; Diessel O, 2022, 'Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work', in Proceedings 2022 IEEE 30th International Symposium on Field Programmable Custom Computing Machines Fccm 2022,
    Conference Papers | 2019
    Kastensmidt FL; Diessel O, 2019, '2019 Reconfigurable Architectures Workshop', in Proceedings 2019 IEEE 33rd International Parallel and Distributed Processing Symposium Workshops Ipdpsw 2019, pp. 69,
    Conference Papers | 2019
    Tran Huu Nguyen N; Cetin E; Diessel O, 2019, 'Scheduling configuration memory error checks to improve the reliability of FPGA-based systems', in Iet C